METHOD FOR FORMING MICROPATTERN IN SEMICONDUCTOR DEVICE

摘要

A method of forming the micro-pattern of a semiconductor device is provided to improve the nonuniformity of the critical dimension of a line width due to twice mask processes in the DPT(Double Patterning Technology) process. The first etch stopper layer(202), the second etch stopper layer and the first sacrificial layer are successively formed on the etch target layer(201). The first sacrificial layer and the second etch stopper layer are locally etched to form the first sacrificed pattern(204A). The insulating layer(209A) is formed along the upper side of first etch stopper layer including the first sacrificed pattern. The second sacrificial layer is formed on the insulating layer. The second sacrificial layer and the insulating layer are planarized and the first sacrificed pattern is exposed. The first sacrificed pattern and the second sacrificial layer are removed. The second etch stopper layer and the insulating layer are etched and the second sacrificed pattern is molded. The first etch stopper layer is etched by using the second sacrificed pattern as the etch barrier layer. The etched layer is etched by using the etched first etch stopper layer as the etch barrier layer.