| 摘要 |
A simulation method for reducing a simulation time is provided to group a plurality of blocks during circuit design of blocks and perform re-simulation with regard to only a group including blocks having error, thereby reducing the entire simulation time. If simulation is started(S31), initial simulation with regard to the entire function blocks of circuit design is performed(S32). It is determined whether blocks having error exist according to the simulation resulit(S32). When blocks having error exist, functional blocks during circuit design are grouped(S34). If the grouping is terminated, a signal inputted to a group including the blocks having error among the groups is stored to manufacture a new test bench(S35). Debugging is performed(S36). Only groups having defective blocks clearing error are re-simulated by using the new test bench(S37). A signal outputted from the group including the block having error is analyzed through a monitor based on the re-simulated result and it is determined whether the signal includes error(S38). If error is not generated, simulation is terminated(S39).
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