SHIFT REGISTER FOR AN ACTIVE-MATRIX FLAT SCREEN

摘要

In a shift register driven by two complementary clock signals for controlling the selection of lines R(n) of image dots of a flat screen, a control transistor T3 is driven by one of the clock signals, and connected between this clock signal and the output node Sn connected to the corresponding line. A capacitance connected between an internal node Pn, connected to the gate of the control transistor T3 and the output node Sn, is discharged at least with each startup of the screen, by discharge means T5 provided in each stage. Application to flat screens with integrated active matrix.