发明名称 MULTIPLE-CHANNEL SELF-ALIGNMENT TRANSISTOR FABRICATED BY DOUBLE SELF-ALIGNMENT PROCESS AND ITS MANUFACTURING METHOD
摘要 <p>A multiple-channel self-alignment transistor fabricated through double self-alignment process by sequentially determining the positions of the gate, drain, and source electrodes by two back exposures, having a vertical structure using a comb gate electrode, and having multiple short channels and its manufacturing method are provided. A multiple-channel self-alignment transistor fabricated by a double self-alignment process comprises opaque gate electrodes (11) of a comb shape formed on a substrate (10), an insulating film (21) formed over the opaque gate electrodes (11), a transparent drain electrode (12) formed by a first back exposure through the substrate (10) between the comb opaque gate electrodes (11), transparent source electrodes (13) formed above an insulating film (21a) formed thereon and the comb opaque gate electrodes (11) by a second back exposure through the substrate (10), and a semiconductor (31) formed thereon.</p>
申请公布号 WO2009031377(A1) 申请公布日期 2009.03.12
申请号 WO2008JP63887 申请日期 2008.08.01
申请人 NATIONAL UNIVERSITY CORPORATION UNIVERSITY OF TOYAMA;OKADA, HIROYUKI;NAKA, SHIGEKI 发明人 OKADA, HIROYUKI;NAKA, SHIGEKI
分类号 H01L21/336;H01L29/786 主分类号 H01L21/336
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