发明名称 HIERARCHAL CACHE MEMORY SYSTEM
摘要 PROBLEM TO BE SOLVED: To increase the speed of a write-back process in a hierarchical cache memory system. SOLUTION: A hierarchical cache memory system having a first and a second cache memory includes: a controller which outputs dirty data stored in the first cache memory to write back to a main memory; and a controller which processes the write-back to the main memory of the dirty data outputted from the first cache memory in parallel with the write-back to the main memory of dirty data stored in the second cache memory. COPYRIGHT: (C)2009,JPO&INPIT
申请公布号 JP2009053820(A) 申请公布日期 2009.03.12
申请号 JP20070218400 申请日期 2007.08.24
申请人 NEC ELECTRONICS CORP 发明人 MIWA HIDEYUKI;YAMADA TAMOTSU
分类号 G06F12/08 主分类号 G06F12/08
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