| 摘要 |
An integrated circuit testing method includes: respectively connecting a plurality of pads in a chip to generate a plurality of scan chains, wherein each scan chain connects two pads and at least one flip-flop in the chip; providing at least a selecting unit, wherein the selecting unit determines a mode according to a plurality of available scan chains after the chip is packaged; and determining a target scan chain to be connected with a target flip-flop corresponding to the selecting unit according to the mode determined by the selecting unit.
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