发明名称 INTERFACE CIRCUIT AND INTERFACE METHOD
摘要 PROBLEM TO BE SOLVED: To increase a transmission speed and to reduce the number of cables required for an interface. SOLUTION: The interface circuit 1 comprises a logical state judging part 2 and an electric current source 3. The logical state judging part 2 judges the logical state of each phase of 3-phase logic signal (0 or 1) that is inputted. The electric current source 3 outputs 3-phase balanced currents Ix, Iy, and Iz of positive or negative phases according to the judgement of the logical state judging part 2. Since Ix, Iy, and Iz are all 3-phase balanced currents, the currents of 6 patterns except for 2 patterns set to all positives and all negatives, are outputted. Thus, more pattern signals can be transmitted than before. COPYRIGHT: (C)2009,JPO&INPIT
申请公布号 JP2009055289(A) 申请公布日期 2009.03.12
申请号 JP20070219499 申请日期 2007.08.27
申请人 FUJITSU MICROELECTRONICS LTD;FUJITSU ELECTRONICS INC 发明人 NOZUKI HIROYASU
分类号 H04L25/02;H04B3/02 主分类号 H04L25/02
代理机构 代理人
主权项
地址