发明名称 Linear voltage regulating circuit with undershoot minimization and method thereof
摘要 A voltage regulating circuit for providing a regulated output voltage. The voltage regulating circuit includes a voltage regulator, a converting circuit, a capacitive device, a first current mirror module, and a second current mirror module. The voltage regulator has a first output producing the regulated output voltage and a second output producing a pass voltage. The converting circuit converts the pass voltage into a first current and a second current passing through a first converting node and a second converting node respectively, where the first current charges/discharges the capacitive device. The first current mirror module has a first current mirror path coupled to the first converting node and a second current mirror path coupled to the second converting node. The second current mirror module has a first current mirror path coupled to the second converting node and a second current mirror path coupled to the first output.
申请公布号 US7498780(B2) 申请公布日期 2009.03.03
申请号 US20070739115 申请日期 2007.04.24
申请人 MEDIATEK INC. 发明人 CHEN HUNG-I;LOU CHIH-HONG
分类号 G05F1/40;G05F1/56 主分类号 G05F1/40
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