发明名称 Abstracted host bus interface for complex high performance ASICs
摘要 An interface is provided to couple an input/output device (e.g., a network interface unit) to one or more different host system buses without altering the configuration of the device (e.g., to include logic specific to the host buses). Functionality of the device (e.g., MTU size, error detection) is therefore independent of the host bus. Host bus logic for managing operation of the host bus is augmented with logic for translating between semantics of the interface and the host bus. Also, end-to-end verification of a complex ASIC in multiple configurations or environments can be performed over the interface without probing into the ASIC.
申请公布号 US7500046(B1) 申请公布日期 2009.03.03
申请号 US20060418901 申请日期 2006.05.04
申请人 SUN MICROSYSTEMS, INC. 发明人 PURI RAHOUL;SRINIVSAN ARVIND;CHILDERS CARL
分类号 G06F13/36 主分类号 G06F13/36
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