发明名称 Decoder and decoding method for decoding low-density parity-check codes with parity check matrix
摘要 In an LDPC-code decoder, bit-processing units are provided, respectively, for the 1st to Mth rows of the parity-check matrix that is formed of (rxs) permuted matrices having respective arrays of (mxm). Each of bit-processing units sequentially updates bit information corresponding to column positions included in the respective rows of the parity-check matrix, a bit at each of the column positions being set to "1".Parity-processing units update parity information corresponding to row positions in columns of each column block of the parity-check matrix, whenever the bit-processing units have finished bit update computation for m column positions in each column block, a bit at each row position being set to "1".The bit-processing units starts next bit update computation after the parity-processing units finish parity update computation for m columns of the first column block of the parity-check matrix.
申请公布号 US7500168(B2) 申请公布日期 2009.03.03
申请号 US20050168329 申请日期 2005.06.29
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 YOSHIDA KENJI
分类号 H03M13/00;H03M13/11 主分类号 H03M13/00
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