发明名称 |
BINARY ARITHMETIC CODING DEVICE |
摘要 |
A binary arithmetic coder which is high-definition and capable of performing a real-time processing is provided. The processing of binary arithmetic coding with respect to the next bit is made possible by a binary arithmetic renormalization section (31) while a ternary data stream is converted into a binary data stream to output a coding bit by a binary conversion section (32) and an f value retention processing section (33) in order to output an updated coding section width and an updated inferiority probability section width at the timing at which the ternary data stream with respect to a target bit is outputted. |
申请公布号 |
CA2697007(A1) |
申请公布日期 |
2009.02.26 |
申请号 |
CA20082697007 |
申请日期 |
2008.08.20 |
申请人 |
NTT ELECTRONICS CORPORATION |
发明人 |
KASUYA, SHIGERU;NAGAI, NORIHIKO |
分类号 |
H03M7/40;H04N19/00;H04N19/102;H04N19/134;H04N19/136;H04N19/192;H04N19/196;H04N19/85;H04N19/91 |
主分类号 |
H03M7/40 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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