发明名称 SEMICONDUCTOR MEMORY DEVICE HAVING MEMORY BLOCK CONFIGURATION
摘要 A memory array including memory mats is arranged in a U shape when seen in two dimensions, and a logic circuit and an analog circuit are arranged in a region unoccupied by the memory array. This facilitates transmission of power supply voltage and signals between the peripheral circuit including the analog and logic circuits and the pad band including power supply and data pads. The analog circuit is positioned close to the power supply pad, so that voltage drop due to the resistance of power supply interconnection is restricted. It is also possible to separate a charge pumping power supply interconnection and a peripheral circuit power supply interconnection in the vicinity of the power supply pad.
申请公布号 US2009052249(A1) 申请公布日期 2009.02.26
申请号 US20080251894 申请日期 2008.10.15
申请人 RENESAS TECHNOLOGY CORP. 发明人 OGURA TAKU;YAMAUCHI TADAAKI;MITANI HIDENORI;KUBO TAKASHI;ARITOMI KENGO
分类号 G11C16/04;G11C16/06;G11C5/02;G11C8/00;G11C8/08;G11C11/00;G11C16/02;G11C16/16;G11C16/26;G11C29/00;G11C29/02;G11C29/04;G11C29/50 主分类号 G11C16/04
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