发明名称 METHOD FOR MANUFACTURING VERTICAL MOS TRANSISTOR
摘要 PROBLEM TO BE SOLVED: To conveniently and accurately manufacture a vertical MOSFET capable of preventing the generation of junction leakage current caused by GIDL. SOLUTION: An insulating film 1 thicker than a gate insulating film is formed between a gate electrode and a lower dopant diffusion region. An insulating film A or insulating film B thicker than the gate insulating film is each formed among the gate electrode, the lower dopant diffusion region, and an upper dopant diffusion region. COPYRIGHT: (C)2009,JPO&INPIT
申请公布号 JP2009043990(A) 申请公布日期 2009.02.26
申请号 JP20070208194 申请日期 2007.08.09
申请人 ELPIDA MEMORY INC 发明人 OYU SHIZUNORI
分类号 H01L21/336;H01L29/78 主分类号 H01L21/336
代理机构 代理人
主权项
地址