发明名称 BUS CONTROLLER
摘要 PROBLEM TO BE SOLVED: To provide a bus controller configuring a bus to prevent enlargement of a chip area due to wiring congestion, and controlling the bus. SOLUTION: In this bus controller 2, an arbitration part 21 arbitrates access requests from a plurality of masters 1-N (1-1 to 1-N). A slave access control part 23 performs access arbitrated by the arbitration part 21 to a slave 4. The bus controller 2 is connected with the plurality of masters 1-N (1-1 to 1-N) by a one-way read bus RD and one-way write buses WD1-WDN, and the write buses WD1-WDN are configured such that a bus width of each the write bus WD1-WDN becomes narrower than a bus width of the read bus RD. Accordingly, there is effect that it can be prevented that the chip area becomes large by the wiring congestion. COPYRIGHT: (C)2009,JPO&INPIT
申请公布号 JP2009042992(A) 申请公布日期 2009.02.26
申请号 JP20070206748 申请日期 2007.08.08
申请人 RENESAS TECHNOLOGY CORP 发明人 TAKADA YUKARI
分类号 G06F13/28 主分类号 G06F13/28
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