发明名称 SEMICONDUCTOR MEMORY DEVICE AND WORD DECODER CONTROL METHOD
摘要 PROBLEM TO BE SOLVED: To provide a semiconductor memory device that can maintain a leakage current reduction effect in a memory block in an inactive state while eliminating unnecessary current-consuming operation. SOLUTION: The semiconductor memory device has a main word decoder that sets a selected main word line to a first potential and sets a non-selected main word line to a second potential or a third potential, a periodic signal generating circuit that generates a periodic signal indicating timing at predetermined time intervals, a block selection circuit that selects a memory block to be accessed, and a sequential selection circuit that sequentially selects a plurality of memory blocks one by one, wherein the main word decoder is controlled so that the main word line of the memory block selected by the block selection circuit is set to a third potential, the main word line is maintained at the third potential after being accessed, and the main word line of the memory block selected by the sequential selection circuit is set to the second potential at the timing indicated by the periodic signal. COPYRIGHT: (C)2009,JPO&INPIT
申请公布号 JP2009043373(A) 申请公布日期 2009.02.26
申请号 JP20070209833 申请日期 2007.08.10
申请人 FUJITSU MICROELECTRONICS LTD 发明人 HARA KOTA
分类号 G11C11/408;G11C11/406 主分类号 G11C11/408
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