发明名称 SEMICONDUCTOR TEST CIRCUIT AND SEMICONDUCTOR TEST METHOD
摘要 PROBLEM TO BE SOLVED: To provide a semiconductor test circuit and a semiconductor test method which shorten an inspection time of semiconductor, also perform strict operation speed inspection of a memory. SOLUTION: The semiconductor circuit having a normal circuit in which a scan test can be performed and a memory connected to a normal circuit is provided, and the circuit is equipped with a BIST control circuit having a mode 1 in which a pattern is written in the memory and is stopped automatically and a mode 2 in which a value written from the memory is read out and it is compared with the prescribed expected value, and a memory write-in forbidding circuit for fixing an input signal for the memory during the period of time when the normal circuit is in the scan test. COPYRIGHT: (C)2009,JPO&INPIT
申请公布号 JP2009043405(A) 申请公布日期 2009.02.26
申请号 JP20080270111 申请日期 2008.10.20
申请人 PANASONIC CORP 发明人 MATSUMOTO YOSHIFUMI
分类号 G11C29/12;G11C29/02 主分类号 G11C29/12
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