发明名称 Half Width Counting Leading Zero Circuit
摘要 A circuit and method are provided for storing a data word in a latch and determining the number of consecutive equal value bits within the data word. The data word consists of bits stored in unique bit positions and having a least significant bit position and a most significant bit position. The data word is examined to determine the number of consecutive bits having the same numeric value. The invention first corrects for any single bit anomaly within the consecutive equal value sequence, counts the number of consecutive bits having this equal value using logic that examines only every other bit position of the stored data word and provides a numeric value representing this number of consecutive equal value bits.
申请公布号 US2009055454(A1) 申请公布日期 2009.02.26
申请号 US20070844402 申请日期 2007.08.24
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 SINGH DEEPAK K.;MCCLOSKEY SCOTT MICHAEL
分类号 G06F15/00 主分类号 G06F15/00
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