| 摘要 |
The present invention allows emulation of a programmable pipeline processor fabric or architecture. According to certain aspects, the invention permits real-time capture of state information for any given stage of a processing flow performed by the fabric or architecture. According to other aspects, the invention allows a particular stage and data set of a SIMD flow to be analyzed. According to other aspects, the invention utilizes an independent clocking domain for the capture of state information.
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