发明名称 |
Method of Fabricating an Integrated Circuit |
摘要 |
A method of fabricating an integrated circuit, including the steps of forming a first mask layer in the form of a hard mask layer including a plurality of first openings and a second mask layer with at least one second opening which at least partially overlaps with one of the first openings, wherein the at least one second opening is generated lithographically; and at least two neighboring first openings are distanced from each other with a center to center pitch smaller than the resolution limit of the lithography used for generating the second opening.
|
申请公布号 |
US2009053892(A1) |
申请公布日期 |
2009.02.26 |
申请号 |
US20070843052 |
申请日期 |
2007.08.22 |
申请人 |
MEYER STEFFEN;WEIS ROLF;LUDWIG BURKHARD;NOELSCHER CHRISTOPH |
发明人 |
MEYER STEFFEN;WEIS ROLF;LUDWIG BURKHARD;NOELSCHER CHRISTOPH |
分类号 |
H01L21/44 |
主分类号 |
H01L21/44 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|