发明名称 Semiconductor device having a trench isolation and method of fabricating the same
摘要 The present invention provides a method of fabricating a semiconductor device in which deterioration in a transistor characteristic is prevented by preventing a channel stop implantation layer from being formed in an active region. A resist mask is formed so as to have an opening over a region in which a PMOS transistor is formed. Channel stop implantation is performed with energy by which ions pass through a partial isolation oxide film and a peak of an impurity profile is generated in an SOI layer, thereby forming a channel stop layer in the SOI layer under the partial isolation oxide film, that is, an isolation region. An impurity to be implanted here is an N-type impurity. In the case of using phosphorus, its implantation energy is set to, for example, 60 to 120 keV, and the density of the channel stop layer is set to 1x1017 to 1x1019/cm3. At this time, the impurity of channel stop implantation is not stopped in the SOI layer corresponding to the active region.
申请公布号 US7494883(B2) 申请公布日期 2009.02.24
申请号 US20060543213 申请日期 2006.10.05
申请人 发明人
分类号 H01L21/336 主分类号 H01L21/336
代理机构 代理人
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