发明名称 Semiconductor yield estimation
摘要 A method, apparatus, and computer program product that performs yield estimates using critical area analysis on integrated circuits having redundant and non-redundant elements. The non-redundant elements are ignored or removed from the critical area analysis performed for undesired opens.
申请公布号 US7496874(B2) 申请公布日期 2009.02.24
申请号 US20050275275 申请日期 2005.12.21
申请人 INETRNATIONAL BUSINESS MACHINES CORPORATION 发明人 BICKFORD JEANNE PAULETTE SPENCE;HIBBELER JASON D.;KOEHL JUERGEN;LIVINGSTONE WILLIAM JOHN;MAYUARD DANIEL NELSON
分类号 G06F17/50 主分类号 G06F17/50
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