发明名称 |
Semiconductor memory device and its data writing method |
摘要 |
This invention provides a semiconductor memory device and its data writing method capable of saving the needed time to a minimum even in repeating a data write operation maximum number of times. More specifically, this invention provides a semiconductor memory device and its data writing method as follows. A flash memory 101 is set at a test mode by fixing the test pad TP at L level. When a verify operation passes, a verify pass signal input terminal (VPASS) of a data write controlling circuit WCC and a verify pass signal input terminal (VPASS) of a data write counter circuit WCT are fixed at L level by a verify pass signal invalidating means 3 although a verify circuit VC outputs an L level verify pass signal VPASS. A latch circuit LC holds a latched verify pass signal VPL at H level and a verify start signal input terminal (VR) of the verify circuit VC is fixed at L level. A write operation without a verify operation is repeated number of times preset in the data write counter circuit WCT.
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申请公布号 |
US7496810(B2) |
申请公布日期 |
2009.02.24 |
申请号 |
US20020247356 |
申请日期 |
2002.09.20 |
申请人 |
OKI ELECTRIC INDUSTRY CO., LTD. |
发明人 |
HARA TAKAHITO |
分类号 |
G01R31/28;G11C29/00;G01R31/3185;G11C16/02;G11C16/34;G11C17/00;G11C29/12;G11C29/52 |
主分类号 |
G01R31/28 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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