VERTICAL JUNCTION FIELD EFFECT TRANSISTOR WITH MESA TERMINATION AND METHOD OF MAKING THE SAME
摘要
<p>A vertical junction field effect transistor (VJFET) having a mesa termination and a method of making the device are described. The device includes: an n-type mesa on an n- type substrate; a plurality of raised n-type regions on the mesa comprising an upper n-type layer on a lower n-type layer; p-type regions between and adjacent the raised n-type regions and along a lower sidewall portion of the raised regions; dielectric material on the sidewalls of the raised regions, on the p-type regions and on the sidewalls of the mesa; and electrical contacts to the substrate (drain), p-type regions (gate) and the upper n-type layer (source). The device can be made in a wide-bandgap semiconductor material such as SiC. The method includes selectively etching through an n-type layer using a mask to form the raised regions and implanting p-type dopants into exposed surfaces of an underlying n-type layer using the mask.</p>
申请公布号
WO2009023502(A1)
申请公布日期
2009.02.19
申请号
WO2008US72413
申请日期
2008.08.07
申请人
SEMISOUTH LABORATORIES, INC.;SANKIN, IGOR;MERRETT, JOSEPH, NEIL