发明名称 PLC SYSTEM SIMULATOR
摘要 PROBLEM TO BE SOLVED: To provide a simulator which accurately simulates delay in writing to a network shared memory occurred in a PLC system. SOLUTION: A delay simulator 1000 includes a plurality of virtual PLC units 100 which corresponds to each actual PLC equipment on a one-on-one basis and executes a program 111 in actual PLC equipment to output a request of writing a value to a network shared memory, a state transition monitoring section 300 for monitoring a state transition of each program 111, and a delay simulating section 500 which, when a writing request is entered from any of the virtual PLC units 100, obtains current transition states of the programs 111 of all the virtual PLC units 100 from the state transition monitoring section 300, individually determines a delay time, which indicates the timing of when a value should be written to a delay simulation result memory 120 of each virtual PLC unit 100 except the unit that outputs the writing request, on the basis of the obtained transition states, and writes the value to the corresponding delay simulation result memories 120 after the delay time is elapsed. COPYRIGHT: (C)2009,JPO&INPIT
申请公布号 JP2009037329(A) 申请公布日期 2009.02.19
申请号 JP20070199481 申请日期 2007.07.31
申请人 MITSUBISHI ELECTRIC CORP 发明人 OTANI HARUYUKI;ISHIDA HITOSHI
分类号 G05B19/05 主分类号 G05B19/05
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