发明名称 MEMORY CONTROLLER PRIORITIZATION SCHEME
摘要 A system includes a processor coupled to a memory through a memory controller. The memory controller includes first and second queues. The memory controller receives memory requests from the processor, assigns a priority to each request, stores each request in the first queue, and schedules processing of the requests based on their priorities. The memory controller changes the priority of a request in the first queue in response to a trigger, sends a next scheduled request from the first queue to the second queue in response to detecting the next scheduled request has the highest priority of any request in the first queue, and sends requests from the second queue to the memory. The memory controller changes the priority of different types of requests in response to different types of triggers. The memory controller maintains a copy of each request sent to the second queue in the first queue.
申请公布号 US2009049256(A1) 申请公布日期 2009.02.19
申请号 US20070837943 申请日期 2007.08.13
申请人 HUGHES WILLIAM A;KALYANASUNDHARAM VYDHYANATHAN;MADRID PHILIP E;ISAAC ROGER 发明人 HUGHES WILLIAM A.;KALYANASUNDHARAM VYDHYANATHAN;MADRID PHILIP E.;ISAAC ROGER
分类号 G06F12/00 主分类号 G06F12/00
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