| 摘要 |
PROBLEM TO BE SOLVED: To provide a processor and a data reading method by a processor for reducing the number of instructions required in the case of loading non-aligned data blocks to a register file in the processor. SOLUTION: A register file 13 installed in a processor 1 stores load data from a data memory 51, and supplies input data to an instruction performance part 14. Furthermore, the register file 13 is provided with a plurality of registers R0 to R31 for storing data of a plurality of bits, and configured to update the storage data of the registers R0 to R31 by shifting the storage data of the registers R0 to R31 among those registers R0 to R31. COPYRIGHT: (C)2009,JPO&INPIT
|
