发明名称 Method of fabricating flash memory cell
摘要 A flash memory cell is provided. A deep well is disposed in a substrate and a well is disposed within the deep well. A stacked gate structure is disposed on the substrate. A source region and a drain region are disposed in the substrate on each side of the stacked gate structure. A select gate is disposed between the stacked gate structure and the source region. A first gate dielectric layer is disposed between the select gate and the stacked gate structure. A second gate dielectric layer is disposed between the select gate and the substrate. A shallow doped region is disposed in the substrate under the stacked gate structure and the select gate. A deep doped region is disposed in the substrate on one side of the stacked gate structure. The conductive plug on the substrate extends through the drain region and the deep doped region.
申请公布号 US7491607(B2) 申请公布日期 2009.02.17
申请号 US20070750320 申请日期 2007.05.17
申请人 POWERCHIP SEMICONDUCTOR CORP. 发明人 WONG WEI-ZHE;YANG CHING-SUNG
分类号 H01L21/336 主分类号 H01L21/336
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