| 摘要 |
An electronic circuit assembly having at least one memory with error correction. The assembly has at least one memory with an error detection circuit and an error correction circuit. The error detection circuit is short-circuited if no error is detected by the detection circuit. The data read in the memory are transmitted directly to a first stage of the assembly and, at the same time, to the error detection and correction circuits. If the detection circuit detects an error, it controls transmission to the first stage, by use of a multiplexer, of the data corrected by the correction circuit and performs decontamination of the stages liable to have been contaminated by the erroneous data. Each stage has a latch, the detection circuit then also holds the latches of the successor stages until the data has been corrected in the first stage.
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