| 摘要 |
A chip scale package jig loading/marking system is provided to improve accuracy and productivity for a CSP(Chip Scale Package) strip, and a jig loading and marking process by detecting a defect of a semiconductor chip on a strip. A jig in which a chip scale package strip is mounted is supplied by a loading unit. The defect of the chip scale package is tested by a first vision part(109). The test of the first vision part is performed by inspecting the mark on the chip scale package strip. A character is marked on the chip scale package strip by a laser marking unit(113). The error about the marked character is tested by a second vision part(114). A final jig assembly part is loaded by an unloading unit.
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