| 摘要 |
When a first half of a transmission packet is sent by an FSK modulating signal, and a latter half thereof is sent by a PSK modulating signal, a received signal is converted into an intermediate frequency signal by a mixer. The converted intermediate frequency signal is switched to an FSK demodulation unit and a PSK demodulation unit by a received signal changeover switch. A frequency error detection circuit is provided in the FSK demodulation unit to detect a frequency error detection value. A demodulation circuit of a phase locked loop type of the PSK demodulation unit includes a loop filter. The frequency error detection value detected by the frequency error detection circuit is set as an initial value of this loop filter, whereby a time until lockup of a phase locked loop is reduced at the time when reception of a PSK modulating signal is started.
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