发明名称 Critical path estimating program, estimating apparatus, estimating method, and integrated circuit designing program
摘要 A computer-readable recording medium on which is recorded a program, which is used by a computer for estimating a critical path among a plurality of paths given as paths within an integrated circuit, for causing the computer to execute a process, the process comprising receiving from a memory inputs of a logic description for the integrated circuit, and the plurality of given paths, obtaining a path evaluation value, which represents a delay of a path, for each of the given paths, and prioritizing the paths according to evaluation values, and estimating a path having a large evaluation value as the critical path.
申请公布号 US7493580(B2) 申请公布日期 2009.02.17
申请号 US20060468900 申请日期 2006.08.31
申请人 FUJITSU MICROELECTRONICS LIMITED 发明人 HORITA KEISUKE
分类号 G06F17/50 主分类号 G06F17/50
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