发明名称 Yield-enhancing methods of providing a family of scaled integrated circuits
摘要 An integrated circuit die (e.g., a programmable logic device (PLD) die) is manufactured that has the capability of being configured as at least two differently-sized family members. The IC die is tested prior to packaging. If a first portion of the IC die is fully functional, but a second portion includes a localized defect, then the IC die is packaged with a product selection code that configures the IC die to operate as only the first portion of the die. The second portion of the die is deliberately rendered non-operational. Therefore, the IC die can still be sold as a fully functional packaged IC.
申请公布号 US7491576(B1) 申请公布日期 2009.02.17
申请号 US20060333990 申请日期 2006.01.17
申请人 XILINX, INC. 发明人 YOUNG STEVEN P.;BAUER TREVOR J.;GOETTING F. ERICH;LAMARCHE P. HUGO;MCGUIRE PATRICK J.;OH KWANSUHK;PANG RAYMOND C.;TALLEY BRUCE E.;WU PAUL YING-FUNG
分类号 H01L21/66;H01L21/44;H01L21/48;H01L21/50 主分类号 H01L21/66
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