发明名称 Real-time reassembly of ATM data
摘要 The real-time reassembly of data received over an ATM network is enabled by a system including two digital memories, an indicator for indicating one of the two memories as a process memory and another one of the two memories as a storage memory, a buffer memory, a processor which processes the digital contents of a cell stored in the process memory and stores the digital contents of a subsequent cell in the storage memory. In operation of the system, the processing of the contents of the process memory is completed prior to completion of the receiving and storing of the contents of the subsequent cell in the storage memory.
申请公布号 US7492790(B2) 申请公布日期 2009.02.17
申请号 US20020282838 申请日期 2002.10.29
申请人 AGILENT TECHNOLOGIES, INC. 发明人 BURNETT CHARLES J.
分类号 H04L12/28;H04J3/24;H04L12/56 主分类号 H04L12/28
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