PHASE CHANGE MEMORY DEVICE AND OPERLATING METHOD THE SAME

摘要

A phase change memory device and an operating method of the same are provided to write separately reset data and set data at different periods in a write operation mode. A cell array unit includes a plurality of phase change cells which are arranged in crossing regions between a plurality of word lines(WL1_n-WLn_n,WLn_m) and a plurality of bit lines(BL1_m-BL4_m, BL1_n-BL4_n). A global bit line(GBL) is shared by the bit lines. A bit line selection switching element is formed to connect selectively the bit lines with the global bit line according to bit line selection signals(LY1_m-LY4_m, LY1_n-LY4_n). A write driving unit is connected to the global bit line in order to supply a write voltage to a phase change resistance cell.