| 摘要 |
A semiconductor memory device is provided to reduce failure due to disconnection between a dummy bit line and a word line. A plurality of word lines(WL20-WL24) are formed in a first direction on a cell array region(20). A plurality of bit lines(BL20-BL23) are formed in a second direction perpendicular to the first direction. At least two or more dummy bit lines(DBL20~DBL23) are laminated on the word lines in an edge of the cell array region. The dummy bit lines are formed in parallel to the bit lines. |
