Semiconductor memory devices that are resistant to power attacks and methods of operating semiconductor memory devices that are resistant to power attacks

摘要

A semiconductor memory device according to some embodiments includes a random converter that receives data and address information including a start address value and an end address value of the address from a central processing unit (CPU), generates and stores at least one random number for each address value from the start address value to the end address value, performs a logical operation on the random number and the data corresponding to the address, and responsively generates randomized data to be stored in memory. Accordingly, the semiconductor memory device randomizes a power consumption signature that can occur when data is stored, thereby writing and reading data in a manner that is resistant to a power attack.