发明名称 Flat display and method for modulating a clock signal for driving the same
摘要 A flat display and a method for modulating a clock signal for driving a flat display are provided. The flat display includes a clock generator and a clock modulator. The clock generator provides a clock signal that includes at least a first cycle waveform and a second cycle waveform following said first cycle waveform. The first cycle waveform is modulated by the clock modulator as a first modulated cycle waveform divided by a first positive modulated cycle waveform and a first negative modulated cycle waveform, and the second cycle waveform is modulated as a second modulated cycle waveform divided by a second positive modulated cycle waveform and a second negative modulated cycle waveform. The first positive modulated cycle waveform and the first negative modulated cycle waveform have a first duration difference, and the second positive modulated cycle waveform and the second negative modulated cycle waveform have a second duration difference different from the first duration difference.
申请公布号 US2009040160(A1) 申请公布日期 2009.02.12
申请号 US20080006621 申请日期 2008.01.04
申请人 TPO DISPLAYS CORP. 发明人 JIANG JIAN-XUN;WENG CHIH-HSUN
分类号 G02F1/33 主分类号 G02F1/33
代理机构 代理人
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