发明名称 METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
摘要 <p><P>PROBLEM TO BE SOLVED: To provide a semiconductor device which has a high positional accuracy of vias and has a semiconductor chip having a high yield and a high reliability incorporated, etc. in an insulating layer, and to provide its manufacturing method. <P>SOLUTION: The semiconductor device comprises: the semiconductor chip 20 formed with pads 23 for external connection and an alignment mark 22 for forming a via; the insulating layer 12 made of a non-photosensitive resin and having a plurality of vias 14; and an interconnection 15 which is electrically connected to the pads 23 for external connection via the vias 14 and has at least part thereof formed on the insulating layer 12. The insulating layer 12 is formed with concave portions 13 above individual alignment marks 23. The bottom faces of the concave portions 13 consist of only the insulating layer 12. <P>COPYRIGHT: (C)2009,JPO&INPIT</p>
申请公布号 JP2009032720(A) 申请公布日期 2009.02.12
申请号 JP20070192026 申请日期 2007.07.24
申请人 NEC CORP;NEC ELECTRONICS CORP 发明人 MURAI HIDEYA;MORI KENTARO;YAMAMICHI SHINTARO;KAWANO MASAYA;MAEDA TAKEHIKO;SOEJIMA KOJI
分类号 H05K3/46;H01L23/12;H05K1/02 主分类号 H05K3/46
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