A SHIFT REGISTER

摘要

A shift register is provided to prevent The deterioration of the pull down transistor by turning ON or OFF the pull down transistor in every period. A shift register includes a plurality of stages (STn) which successively outputs the scan pulse through each output terminal. Each stage of the pull-up switching element is controlled depending on the signal state of the first node. The pull-up switching element is connected between the clock transmission line transmitting the first clock pulse and the output terminal. The first full down switching element is controlled depending on the signal state of the second Node. The first full down switching element is connected between the discharge power line transmitting the discharge voltage source and the output terminal. The second full down switching element is controlled by the second clock pulse having the different phase with the first clock pulse. The second full down switching element is connected between the discharge power line and the output terminal.