发明名称 SEMICONDUCTOR MEMORY, AND MANUFACTURING METHOD OF THE SAME
摘要 <p><P>PROBLEM TO BE SOLVED: To avoid occurrence of fault by a GIDL current in a NAND flash memory in which a plurality of cell word lines are arranged in an extremely narrow pitch. <P>SOLUTION: The cell word lines WL0 to WL31 are fine-processed up to the limit of the exposure processes of an exposing apparatus, denoting distance between lines as "A" and width of line as "B", for example, in the NAND memory unit MU. A selection gate line SGS in the source side is arranged, against the cell word line WL0 neighboring thereto, keeping at least the distance of "C=n*A+(n-1)B, an integer of n≥2". <P>COPYRIGHT: (C)2009,JPO&INPIT</p>
申请公布号 JP2009032735(A) 申请公布日期 2009.02.12
申请号 JP20070192278 申请日期 2007.07.24
申请人 TOSHIBA CORP;TOSHIBA MICROELECTRONICS CORP 发明人 ARAI NORIHISA
分类号 H01L21/8247;H01L27/115;H01L29/788;H01L29/792 主分类号 H01L21/8247
代理机构 代理人
主权项
地址