发明名称 Method and apparatus for reconfigurable memory
摘要 A reconfigurable memory in an integrated circuit includes an array of memory cells and a memory controller. The array of memory cells in the reconfigurable memory are tested to determine if they are unusable and if so, their associated physical addresses corresponding to their physical location. After determining the physical addresses where any failure exists, the physical addresses locations associated with the physical locations of unusable memory cells or memory blocks are mapped out to avoid addressing them. While mapping out unusable memory locations or memory blocks reduces the total capacity, the reconfigurable memory has sufficient capacity for the integrated circuit to remain functionally usable.
申请公布号 US7490260(B2) 申请公布日期 2009.02.10
申请号 US20050219008 申请日期 2005.09.01
申请人 INTEL CORPORATION 发明人 VENKATRAMAN SIVA;PHILHOWER, III EARLE F.;KANAPATHIPPILLAI RUBAN;MEHTA MANOJ
分类号 G06F11/00;G06F12/00;G11C5/02;G11C29/00 主分类号 G06F11/00
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