发明名称 |
Memory system having an apportionable data bus and daisy chained memory chips |
摘要 |
A memory system having a memory controller and a daisy chain of memory chips. The memory controller is coupled to memory chips in the daisy chain of memory chips by an address/command bus chain. The memory controller is coupled to memory chips in the daisy chain of memory chips by a data bus chain having a number of data bus bits. The data bus chain has a first portion of data bus bits dedicated to transmitting write data from the memory controller to a memory chip. The data bus chain has a second portion of data bus bits dedicated to transmitting read data from a memory chip to the memory controller. Apportionment of data bus bits between the first portion and the second portion is programmable. Programming is done by pin connection, scanning of a value, or by request from a processor coupled to the memory controller.
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申请公布号 |
US7490186(B2) |
申请公布日期 |
2009.02.10 |
申请号 |
US20060459959 |
申请日期 |
2006.07.26 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
BARTLEY GERALD KEITH;BECKER DARRYL JOHN;BORKENHAGEN JOHN MICHAEL;DAHLEN PAUL ERIC;GERMANN PHILIP RAYMOND;MAKI ANDREW BENSON;MAXSON MARK OWEN |
分类号 |
G06F13/40;G06F13/00 |
主分类号 |
G06F13/40 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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