发明名称 Flash memory device having improved bit-line layout and layout method for the flash memory device
摘要 Provided are a flash memory device having an improved bit-line layout and a layout method for the flash memory device. The flash memory device in which bit lines are disposed based on double patterning technology (DPT), may include at least one main bit line connected to a cell string including a memory cell storing data, at least one dummy bit line disposed parallel to the at least one main bit line, and a common source line transferring a common source voltage, and disposed on a different layer from a layer on which the at least one main bit line and the at least one dummy bit line are disposed, wherein the at least one dummy bit line may include a first dummy bit line transferring a first voltage and a second dummy bit line transferring a second voltage.
申请公布号 US2009034336(A1) 申请公布日期 2009.02.05
申请号 US20080222073 申请日期 2008.08.01
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 KWAK PAN-SUK;LEE DOO-YOUL
分类号 G11C16/04 主分类号 G11C16/04
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