发明名称 LAYOUT AND STRUCTURE OF MEMORY
摘要 A flash memory is provided. The flash memory features of having the select gate transistors to include two different channel structures, which are a recessed channel structure and a horizontal channel. Because of the design of the recessed channel structure, the space between the gate conductor lines, which are for interconnecting the select gates of the select gate transistors arranged on the same column, can be shortened. Therefore, the integration of the flash memory can be increased; and the process window of the STI process can be increased as well. In addition, at least one depletion-mode select gate transistor is at one side of the memory cell string. The select gate transistor of the depletion-mode is always turned on.
申请公布号 US2009032858(A1) 申请公布日期 2009.02.05
申请号 US20070927616 申请日期 2007.10.29
申请人 HUANG SHIN-BIN;HSIAO CHING-NAN;HUANG CHUNG-LIN 发明人 HUANG SHIN-BIN;HSIAO CHING-NAN;HUANG CHUNG-LIN
分类号 H01L29/788 主分类号 H01L29/788
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