| 摘要 |
The present invention provides a highly accurate oscillation circuit. For example, the oscillation circuit includes plural ring oscillator units RO1 and RO2 including inverter circuits IV of an odd number of stages, and an adding unit ADD that adds signals of output nodes RO-01 and RO-02 of the RO1 and RO2. It outputs an addition result of the ADD from an output node OSC_O as a clock signal, and feeds the output node OSC_O back to input nodes RO_I1 and RO_I2 of the RO1 and RO2. Thereby, for example, when each of delay times of the RO1 and RO2 disperses based on a normal distribution of standard deviation sigma, the dispersion of a clock signal obtained from the OSC_O can be confined to sigma/√{square root over (2)}.
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