发明名称 Circuit and Method for Trimming Integrated Circuits
摘要 A programmable after-package, on-chip reference voltage trim circuit for an integrated circuit having a plurality of programmable trim cells generating a programmed sequence. A converter is provided to convert the bit sequence into a trim current. The trim current is added to an initial value of a reference voltage to be trimmed, as generated by the integrated circuit. Once the correct value of the trim current is determined, isolation circuitry is programmed to isolate the trim circuitry from the remainder of the IC, thereby freeing the logic and package pins associated with the IC for use by users of the IC. The preferred trim circuitry includes fuses which are blown in accordance with a bit value supplied to the trim cell to permanently fix a trim current value, once a best fit value is determined.
申请公布号 US2009033373(A1) 申请公布日期 2009.02.05
申请号 US20080248915 申请日期 2008.10.10
申请人 发明人 SHYR YOU-YUH;NEGRU SORIN LAURENTIU
分类号 H03F3/45;G01R31/26;G11C17/18 主分类号 H03F3/45
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