发明名称 Locked loop circuit
摘要 A circuit for receiving an input signal having a first frequency and generating an output signal having a second frequency. The circuit comprises a forward branch for receiving the input signal and generating the output signal and a return branch for generating a feedback signal from the output signal. The forward branch comprises a frequency detector for receiving the input signal and the feedback signal and outputting a value based on a ratio of a frequency of the feedback signal to the first frequency; a word length reduction block for receiving a fractional component of a first division factor and generating a modulated output; an adder for forming a sum of an integer component of the first division factor and the modulated output of the word length reduction block; a subtracting element for subtracting the output value of the frequency detector from the sum; and an oscillator controlled by an output from the subtracting element.
申请公布号 US2009033376(A1) 申请公布日期 2009.02.05
申请号 US20080219075 申请日期 2008.07.15
申请人 LESSO JOHN PAUL 发明人 LESSO JOHN PAUL
分类号 H03B21/00 主分类号 H03B21/00
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