发明名称 ARITHMETIC PROCESSING DEVICE AND PROGRAM
摘要 <P>PROBLEM TO BE SOLVED: To improve the efficiency of a processing for executing an arithmetic operation by generating a reference table in a reconfigurable circuit. <P>SOLUTION: In a reconfigurable processor 34, an LUT 118 generated in an RAM 112 before reconfiguration is maintained, reconfiguration is performed, and a logic shown in (a) is set. Namely, the LUT 118 is referred to, a logic for constructing a processing 1A part and a processing 1B part 114 for performing image processing and a logic for generating an LUT 136 in an RAM 130 are set, and processing based on the both logics is carried out in parallel. In the next reconfiguration, as shown in (b), the LUT 136 is maintained, a logic for performing image processing is set with reference to the LUT 136. <P>COPYRIGHT: (C)2009,JPO&INPIT
申请公布号 JP2009027324(A) 申请公布日期 2009.02.05
申请号 JP20070186849 申请日期 2007.07.18
申请人 FUJI XEROX CO LTD 发明人 NAITO TAKAO;YAMADA KAZUO
分类号 H03K19/173 主分类号 H03K19/173
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