| 摘要 |
The present invention provides a circuit for receiving an input signal having a first frequency and generating an output signal having a second frequency. The circuit comprises a forward branch for receiving the input signal and generating the output signal and a return branch for generating a feedback signal from the output signal. The return branch comprises a frequency divider 42 for receiving the output signal, for dividing the frequency of the output signal by a factor, and for outputting a modified output signal. The forward branch comprises a detector 32 for comparing the input signal and the modified output signal and outputting a comparison signal indicative of said comparison; a word-length reduction circuit 36 for reducing the number of bits of said comparison signal, thereby generating a reduced-length comparison signal; a digital-to-analogue converter 38 for converting said reduced-length comparison signal to analogue, thereby generating an analogue signal; and an oscillator 40, controlled by said analogue signal. By reducing the word length of the input to the digital-to-analogue converter, the digital-to-analogue converter may be greatly simplified. The use of noise shaping circuits is discussed. Other keywords: PLL, delta sigma, dither, truncation, scrambler, noise shaper. |
