发明名称 Output buffer circuit with de-emphasis function
摘要 Disclosed is an output buffer circuit including main-data output buffers; a de-emphasis output buffer; and a selector that performs switching control in such a way that, based on a control signal indicating whether de-emphasis is to be enabled or disabled, main data is supplied to the de-emphasis output buffer to make the buffer operate as a main-data output buffer when the control signal indicates that de-emphasis is to be disabled, while emphasis data obtained on delaying the main data by the delay circuit is supplied to the de-emphasis output buffer to make the buffer operate as a de-emphasis output buffer when the control signal indicates that de-emphasis is to be enabled.
申请公布号 US7486112(B2) 申请公布日期 2009.02.03
申请号 US20060498084 申请日期 2006.08.03
申请人 NEC ELECTRONICS CORPORATION 发明人 TANAKA MAKOTO
分类号 H03K19/0175 主分类号 H03K19/0175
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